1. Technical Field
The present invention relates to a method for manufacturing a semiconductor device by silicidizing a lower portion of a polycrystalline silicon film that composes a gate electrode, and to a semiconductor device.
2. Related Art
A semiconductor device having a metallic gate electrode, all of which are silicidized, is developed. A typical process for manufacturing such type of semiconductor device is disclosed by, for example, T. Nabatame et al., IEDM Tech. Dig., pp. 83 (2004).
The manufacturing process of T. Nabatame et al. involves, as shown in FIG. 6, growing a gate insulating film 14 composed of a high dielectric constant film (hereinafter referred to as high-k film) composed of hafnium oxide (HfO2) or the like on a semiconductor substrate 12 via an atomic layer deposition (ALD) process, and further growing a polycrystalline silicon film 16 thereon. Then, a metallic film 18 composed of a nickel (Ni) film or the like having a thickness of about 70 nm is deposited on the entire surface of the polycrystalline silicon film 16 via a sputter process. Then, an annealing process is conducted at a temperature of 400 degree C. to silicidize the whole polycrystalline silicon film 16 (hereinafter referred to as a full silicidation process). After a full silicidation process, an ordinary lithographic process is conducted to pattern a photo resist film formed on the polycrystalline silicon film 16, and further, an etch process is conducted to form a gate electrode pattern.
Japanese Patent Laid-Open No. 2005-123,625 discloses a semiconductor device shown in FIG. 7. As shown in FIG. 7, the semiconductor device includes an extension region 38 and a silicide layer 42 having a silicidized source/drain region (not shown) on a surface region of a semiconductor substrate 22. A gate insulating film 32 composed of a high dielectric constant film and a polycrystalline silicon film 36 are deposited on the surface of semiconductor substrate 22 to form a gate electrode. The polycrystalline silicon film 36 includes a first silicide layer 36a as a lower layer and a second silicide layer 36b as an upper layer. A side wall 40 is formed on the side surfaces of the gate insulating film 32 and the polycrystalline silicon film